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Questa ADMS Mixed-Signal Simulation

Questa ADMS works exclusively with Eldo to extend the Questa Verification Platform to analog and mixed-signal, providing a comprehensive environment for verifying complex AMS SoCs. The tool combines multiple high-performance simulation engines to support circuits containing analog IP while accommodating all major hardware description languages.

Questa ADMS supports both event-driven and continuous time AMS verification models, enabling engineers to choose the optimal simulation mode for speed or accuracy depending on design requirements, from fast RTL simulation to high-accuracy SPICE-level analysis.

Key Questa ADMS Solutions:

  • Event-driven AMS verification models
  • Continuous time AMS models
  • SystemVerilog/UVM with AMS extensions
  • Co-simulation between RTL and SPICE
  • SVA applied to analog signals
  • EZwave waveform display
  • Corner analysis with digital signals
  • Familiar Questa debug environment
Flexible Mixed-Signal Verification

Provides event-driven verification models for fastest simulation and continuous time AMS models for high-accuracy analog applications, plus co-simulation between digital RTL and analog SPICE designs.

  • Event-driven models for fastest simulation
  • Continuous time models for high-accuracy analog
  • Co-simulation between RTL and SPICE
  • Supports all major HDL and exchange standards
Digital Verification for AMS

Leverages SystemVerilog and UVM with mixed-signal extensions for functional verification handling analog signals, enabling use of SVA applied to analog signals within the familiar Questa debugging environment.

  • SystemVerilog and UVM with mixed-signal extensions
  • SVA applied to analog signals
  • Fast event-driven and real number modeling
  • Familiar Questa debugging environment
Analog Design and Verification for AMS

Supports analog testbenches for mixed-signal designs with corner analysis in the presence of digital signals, EZwave waveform display functionality, and visual debugging of current contributions.

  • Analog testbenches for mixed-signal designs
  • Corner analysis with digital signal presence
  • EZwave waveform display and analysis
  • Visual debugging of current contributions
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