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We are creative, ambitious and ready for challenges! Hire Us
We are creative, ambitious and ready for challenges! Hire Us
We have 20+ years of experience in delivering superior and innovative products
22, Sin Ming Lane, #05-75 Midview City Singapore 573969
info@advinno.com
(+65) 6777-2240 / 6570 6086
Questa ADMS works exclusively with Eldo to extend the Questa Verification Platform to analog and mixed-signal, providing a comprehensive environment for verifying complex AMS SoCs. The tool combines multiple high-performance simulation engines to support circuits containing analog IP while accommodating all major hardware description languages.
Questa ADMS supports both event-driven and continuous time AMS verification models, enabling engineers to choose the optimal simulation mode for speed or accuracy depending on design requirements, from fast RTL simulation to high-accuracy SPICE-level analysis.
Provides event-driven verification models for fastest simulation and continuous time AMS models for high-accuracy analog applications, plus co-simulation between digital RTL and analog SPICE designs.
Leverages SystemVerilog and UVM with mixed-signal extensions for functional verification handling analog signals, enabling use of SVA applied to analog signals within the familiar Questa debugging environment.
Supports analog testbenches for mixed-signal designs with corner analysis in the presence of digital signals, EZwave waveform display functionality, and visual debugging of current contributions.